Your Job:

Responsible for aligning customer with mainstream, RF and advanced node design enablement requirements specializing digital design to achieve design win and tape out targets.
Serve as single technical interface to customer and work with FAE to coordinate all technical sales interaction
Develop customized technical presentations and proposals to assist customers in the evaluation of our solutions
Formulate customer requirements and promote a compelling GlobalFoundries design solution with our enablement (PDK) and convey our value proposition
Identify and propose solutions to gaps and bottlenecks in the GlobalFoundries PDK to meet customer requirements
Understand competitive design/technology/product landscape including emerging technology trends and competitive threats
Continuously learn about the customer and product, developing relationships, gathering intelligence, uncovering new opportunities
Ensure that issues/obstacles/questions to a design win are resolved either directly or by engaging internal experts
Replicate customer issues, provide timely technical support to meet design win, tape out, and MPW goals and ensure first time silicon success.
Required Qualifications:

Bachelors, Master’s in EEE or ECE with minimum one year and hands-on experience in digital flow/methodology, physical implementation and EDA tools
Preferred Qualifications:

Familiar in whole chip integration, top level floor planning, placement optimization, clock-tree synthesis, timing closure and back-end physical design.
Good knowledge on static timing analysis, EM analysis, IR-Drop, crosstalk analysis, formal verification and physical verification.
Familiar of P&R tools such as Synopsys IC Compiler II, Cadence Innovus
Familiar with digital design implementation flow and design methodology
Excellent communication skills with proven track record of customer engagement and solution provider