Job Description For Cadence Jobs 2022
Strong knowledge in functional verification using High Level Verification languages such as UVM (SystemVerilog or Specman “e”) or C/C++ Capability with scripting in languages like Perl or TCL and shell scripting
Strong knowledge in Makefile based infrastructure to build and run large designs.
Good knowledge of simulation and verification tools.
Good knowledge of how to debug IP or subsystem level designs.
Familiarity with simulation acceleration methodologies and FPGA prototyping
Skills Required For Cadence Jobs 2022
This position requires a BS-EE/CE or MS-EE/CE fresher or entry level candidate with knowledge in the EDA / verification industry, use of verification tools and a strong knowledge base of the verification.